Job Description

Note: This is a full-time, on-site opportunity in San Francisco, CA (no remote).

About:

Our investment is an early-stage BCI wearable tech startup employing an innovative mix of generative AI with patent-pending breakthroughs in hw/sw for SOTA electronic consumer devices. They are seeking an experienced FPGA Design Engineer to join their dynamic team.

Responsibilities:

• Digital design architecting for wireless communication
• DSP Block-level design for wireless communication or signal processing systems
• Responsible for writing RTL Code, simulation and test bench development
• FPGA synthesis and timing closure
• Hardware verification and troubleshooting; familiarity with logic analyzers
• Provide support to the RF and Software Engineering Teams

Qualifications:

• 5+ years industry experience in ASIC/FPGA design (ideally, related to wireless systems, signal processing systems, and/or wireless networking)
• Familiar with VHDL or Verilog
• Familiar with Xilinx or equivalent platforms
• Independent work ethic, flexibility, and resourcefulness
• Strong academic foundation in EE (or similar)

Bonus:

• Prior experience working on SDRs with chips like ADRV9002, AD9361, USRP B210 or boards like Lattice FPGA, Zynq 7000, ZC102

Benefits:

• Competitive salary and comprehensive benefits package
• Opportunities for professional development and career growth
• Inclusive and collaborative work environment

Please note: There are no fees associated with any of the work we do. We provides free candidate referrals/introductions to all of the active investments in our portfolio.

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